Date created: 12/21/15 14:18:09. Last modified: 10/30/18 14:06:54

ASR9006/9010 Specific Hardware Overview

References:

Chassis Level:

The port numbers are Chassis / MPA / Bay / Port. So Te0/1/0/1 is TenGig port 1 in bay 0 on MPA 1 in chassis 0. There the MPA would be a card like an A9K-MOD80-SE:

RP/0/RSP0/CPU0:pe2#show inventory
Mon Dec 21 16:15:18.271 GMT
NAME: "module 0/RSP0/CPU0", DESCR: "ASR9K Route Switch Processor with 440G/slot Fabric and 6GB"
PID: A9K-RSP440-TR, VID: V05, SN: xxxx

NAME: "module 0/RSP1/CPU0", DESCR: "ASR9K Route Switch Processor with 440G/slot Fabric and 6GB"
PID: A9K-RSP440-TR, VID: V05, SN: xxxxx

NAME: "module 0/0/CPU0", DESCR: "80G Modular Linecard, Service Edge Optimized"
PID: A9K-MOD80-SE, VID: V06, SN: xxxxx

NAME: "module 0/0/0", DESCR: "ASR 9000 4-port 10GE Modular Port Adapter"
PID: A9K-MPA-4X10GE, VID: V05, SN: xxxx

NAME: "module mau 0/0/0/0", DESCR: "Multirate 10GBASE-SR, SMF"
PID: XFP-10G-MM-SR       , VID: V02 , SN: xxxx

NAME: "module 0/1/CPU0", DESCR: "80G Modular Linecard, Service Edge Optimized"
PID: A9K-MOD80-SE, VID: V06, SN: xxxx

NAME: "module 0/1/0", DESCR: "ASR 9000 4-port 10GE Modular Port Adapter"
PID: A9K-MPA-4X10GE, VID: V05, SN: xxxx

NAME: "module mau 0/1/0/0", DESCR: "Multirate 10GBASE-SR, SMF"
PID: XFP-10G-MM-SR       , VID: V02 , SN: xxxx

 

NP/Bridge/FIA Level:

The bridge is a memory interface converter and is non blocking (unless there is QOS back pressure downstream, there is generally no reason for the Bridge to drop packets). Both NP, Bridge, FIA and Fabric are all priority aware and have separate queues for High and Low priority traffic as well as Unicast and Multicast. When looking at the bridge one can see UC/MC (unicast/mcast) as well as LP/HP queues.

! ASR9006 with Dual RSP440s using MOD80-SE MPAs

RP/0/RSP0/CPU0:pe2#show controllers fabric fia bridge stats location 0/RSP0/CPU0
Tue Dec 22 10:51:47.662 GMT

 ********** FIA-0 **********
Category: bridge_in-0
                                     From CPU                133105464
                                       To FIA                133105476
                                 Err From CPU                        0

 ********** FIA-0 **********
Category: bridge_eg-0
                                  Hp From FIA                185751515
                                  Lp From FIA                        0
                                       To CPU                185751496
                               HpErr From FIA                        0
                               LpErr From FIA                        0
RP/0/RSP0/CPU0:pe2#show controllers fabric fia bridge stats location 0/RSP1/CPU0
Tue Dec 22 10:51:51.014 GMT

 ********** FIA-0 **********
Category: bridge_in-0
                                     From CPU                  1016658
                                       To FIA                  1016658
                                 Err From CPU                        0

 ********** FIA-0 **********
Category: bridge_eg-0
                                  Hp From FIA                 12719679
                                  Lp From FIA                        0
                                       To CPU                 12719677
                               HpErr From FIA                        0
                               LpErr From FIA                        0


RP/0/RSP0/CPU0:pe2#show controllers fabric fia stats location 0/RSP0/CPU0
Tue Dec 22 10:54:41.247 GMT

 ********** FIA-0 **********
Category: count-0
                         From Unicast Xbar[0]                   169452
                         From Unicast Xbar[1]                        0
                         From Unicast Xbar[2]                172874341
                         From Unicast Xbar[3]                        0
                       From MultiCast Xbar[0]                   338913
                       From MultiCast Xbar[1]                        0
                       From MultiCast Xbar[2]                 12380991
                       From MultiCast Xbar[3]                        0
                           To Unicast Xbar[0]                137285839
                           To Unicast Xbar[1]                        0
                           To Unicast Xbar[2]                        0
                           To Unicast Xbar[3]                        0
                         To MultiCast Xbar[0]                   338913
                         To MultiCast Xbar[1]                        0
                         To MultiCast Xbar[2]                        0
                         To MultiCast Xbar[3]                        0
                         To Line Interface[0]                185755867
                         To Line Interface[1]                       63
                       From Line Interface[0]                133108716
                       From Line Interface[1]                        0
                                Ingress drop:                   169447
                                 Egress drop:                        0
                                 Total drop:                    169447

Trident Line Card Example:

 

Interface/MAC/PHY Level:

In the ASR9000 series, if fragmentation is required of IPv4 packets then the packet is punted to the LC CPU meaning there is no hardware assistance for fragemented packets (continuous fragmented flows will never reach wirerate). IPv6 fragmentation is not supported, the packet is punted and ICMP messages are generated back to the sender (by the LC CPU).